rc-5 encoder op ATtiny45 faalt

/*
-RC5 encoder for wireless control of media player classic
-30 augustus 2008
-clk=1MHz
-
	2bit keys:
	*+ (up arrow key)
	*- (down arrow key)
	*>|| (space key)
	*nothing
-ouput is high z or 0 to be compatible with 3,3 volt input of usb chip witch has a pullup
-PB1=+
-PB2=-
-PB4=pause/play
-http://www.sbprojects.com/knowledge/ir/rc5.htm
-
*/

#include <avr/io.h>
#include <stdio.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdbool.h>//!

#define F_CPU 1000000
#define rx_adress 0 //tv1

bool tick=true; //global, clk for statemachine

ISR(TIMER0_COMPA_vect){
tick=true;
}




int main()
{
int state=0;//state 
int bitteller=0;//bitcounter; used to store bits and to detect end of message.
bool a=false;
bool b=false;
bool end=false;
volatile int i=0;
int bitjes=0;
int address=0;
int command=0;

//timer init:
TCCR0A|=1<<WGM01;//CTC mode
TCCR0B|=1<<CS01;//prescaler=1/8
//OCR0A=444,5/8=56
TCNT0=0;
OCR0A=56;//about 444.4us
TIMSK|=1<<OCIE0A;//interrupt

DDRB&=1<<PINB0;//input pin for tsop

sei();
while(1){

if (tick){
tick=0;

//statemachine:
switch(state){
//-------------------------------------------
case 0:
cli();

while(PINB&(1<<PINB0));//rx=active low

TCNT0=0;//reset for synchronysation
bitteller=0;//start with startbit
bitjes=0;//clear the stored bits
bitjes|=1<<bitteller;//store the startbit	
state=1;//next bit

sei();
break;
//-------------------------------------------
case 1:
//wait 1334us (3/4bit)
//445us have passed so 889us remaining
if (i==2){
i=0;
a=PINB&(1<<PINB0);
state=2;
}
else { 
i++;
}
break;
//-------------------------------------------
case 2:
//wait 889us(1/2bit)
//445us have passed so 445us remaining
if (i==1){
	i=0;
	b=PINB&(1<<PINB0);
	if(a!=b){
		bitteller++;
		bitjes|=a<<bitteller;//10 means 0 and 01 means 1, receiver is inverted

		if (bitteller==13){
			bitteller=0;
			end=true;
			state=1;
		}
		else{
			state=3;
		}

	}

	else { //error!
		cli();
		_delay_ms(25);
		state=0;
		sei();
	}

}
else{ 
i++;
}
break;
//-------------------------------------------
case 3:
if (i==3){
	i=0;
	a=PINB&(1<<PINB0);
	state=2;
}
else { 
	i++;
}

break;
//-------------------------------------------
}//statemachine
}//if(tick==1)
if(end){
	end=false;
	if((bitjes&3)==3){
	address=((bitjes)>>3)&31;	
		if(address==rx_adress){
		command=(bitjes)>>8;
	
		switch(command){
		
		case 12://standby button pressed, standby=12, 12 reversed=12
		//change output:
		DDRB|=1<<PB4;
		break;
		
		case 1://volume+=16, msb=1
		//change output:
		DDRB|=1<<PB1;
		break;
		
		case 17://volume-=17,17 reversed=17
		//change output:
		DDRB|=1<<PB2;
		break;
	
		default: 
		//DDRB&=~((1<<PB1)|(1<<PB2)|(1<<PB4));//clr
		break;
		}
	
	
		}
		else{
		//ignore message
		}

	}
	else{
	//error or extended rc-5
	}


}//if(end)
}//while(1)





return 0;
}

bool tick=true;

volatile bool tick=true;

#define F_CPU 1000000

#define F_CPU 1000000UL

z.c:30: warning: 'TIMER0_COMPA_vect' appears to be a misspelled signal handler
z.c:39: warning: function declaration isn't a prototype

Using built-in specs.
Target: avr
....
gcc version 4.1.3 20070724 (prerelease) (SUSE Linux)

Verbeterd

verbeterd

verbeterd

if(new0!=old0){

verbeterd

/*
-Chris Idema(aka critiacrof)
-RC5 decoder for wireless control of media player classic
-6 september 2008
-version 3.0
-clk=1MHz
-keys:
	*+ (up arrow key)  PB1
	*- (down arrow key)PB2
	*>|| (space key)   PB4
	*nothing
-ouput is high z or 0 to be compatible with 3,3 volt input of usb chip wich has a pullup
-http://www.sbprojects.com/knowledge/ir/rc5.htm
*/
#include <avr/io.h>
#include <stdio.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdbool.h>

#define rx_adress 0 //tv1





int main()
{
volatile bool new0=true, old0=true;//old and new values of input for edge detection
volatile bool tick=false;//edge  

volatile int state=0;

volatile int bitteller=13;//bitcounter; used to store bits and to detect end of message.
volatile int bitjes=0;//message

volatile bool a=true, b=true;//first half and second half of bit

volatile bool end=false;//condition when message is finished

volatile int address=0;//adress(reversed)

volatile int command=0;//commmand(reversed)


//PORTB=0
DDRB&=1<<PINB0;//input pin for tsop

//-------------------------------------------
while(1){

//edge detection:
old0=a;//edge must be detected after first half of bit
while (tick==false){
new0=PINB&(1<<PINB0);
if(new0!=old0){
	tick=true;//edge detected
}

}
tick=false;//reclear



//statemachine:
switch(state){
//-------------------------------------------
case 0:
//wait 444us:
_delay_us(444);

bitteller=13;//start with startbit
bitjes=0;//clear the stored bits
bitjes|=((PINB&(1<<PINB0))^(1<<PINB0))<<bitteller;//store the startbit	
state=1;//next bit
tick=true;//no need to wait for edge

break;
//-------------------------------------------
case 1:
//wait 889us:
_delay_us(444);
_delay_us(445);

a=PINB&(1<<PINB0);//store first half of bit 
state=2;//go to second half

break;
//-------------------------------------------
case 2:
//wait 444us:
_delay_us(444);

b=PINB&(1<<PINB0);
if(a!=b){//bit is correct
	tick=true;//no need to wait for edge
	bitteller--;//next bit
	bitjes|=a<<bitteller;//10 means 0 and 01 means 1, receiver is inverted

	if (bitteller==0){//done
			bitteller=13;//reclear
			end=true;
			state=0;//reset
			a=true;//for edge detection
			tick=false;//reclear
		}
		else{
			state=1;//next bit
		}

	}

else { //error!
	_delay_ms(25);//message is 25 ms long
	state=0;//reset
	a=true;//for edge detection
	tick=false;//wait for edge again
	end=false;//message is not complete
}

break;
//-------------------------------------------
}//statemachine



if(end){
	
	end=false;//reclear
	if((bitjes>>12)==3){//start bits are one's
	address=((bitjes)>>6)&31;	
		if(address==rx_adress){
	
		command=(bitjes)&63;
		
			
			switch(command){
		
			case 12://standby button pressed, standby=12
			//change output:
			DDRB|=1<<PB4;
			_delay_ms(200);
			DDRB&=~(1<<PB4);//clr
			break;
			
			case 16://volume+=16
			//change output:
			DDRB|=1<<PB1;
			_delay_ms(200);
			DDRB&=~(1<<PB1);//clr
			break;
		
			case 17://volume-=17
			//change output:
			DDRB|=1<<PB2;
			_delay_ms(200);
			DDRB&=~(1<<PB2);//clr
			break;
			}
	
		}
		else{
		//ignore message
		_delay_ms(25);//message is 25 ms long
		}

	}
	else{
	//error or extended rc-5
	_delay_ms(25);//message is 25 ms long
	}


}//if(end)
}//while(1)



return 0;
}