SPI connectie PIC en MAX6957

#include <xc.h>

// CONFIG1H
#pragma config FOSC = INTIO67   // Oscillator Selection bits (Internal oscillator block)
#pragma config PLLCFG = OFF     // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = ON    // Primary clock enable bit (Primary clock enabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = OFF      // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 190       // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<5:0> pins are configured as digital I/O on Reset)
#pragma config CCP3MX = PORTB5  // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON      // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0   // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTB5   // ECCP2 B output mux bit (P2B is on RB5)
#pragma config MCLRE = EXTMCLR  // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

//function definitions
int main(void);
void SPI_Setup(void);
void LED_Driver_Configuration(void);
void SPI_Communication(unsigned char command, unsigned char data);

#include <stdio.h>
#include <stdlib.h>
#include <htc.h>
#include "header.h"
#include "main.h"

#define SPI_CS_0 LATBbits.LATB0

void main(void)
{
    //set internal oscillator to 16MHz
    //OSCCON: OSCILLATOR CONTROL REGISTER
    //| 7     | 6   5   4 | 3    | 2      | 1   0    |
    //| IDLEN | IRCF<2:0> | OSTS | HFIOFS | SCS<1:0> |
    //see datasheet page 32
    OSCCON = 0b01111000;

    SPI_Setup();

    LED_Driver_Configuration();

    //set LED on
    SPI_Communication(0x5D, 0x07);

    while(1) continue;
}

void SPI_Setup(void)
{
    //set SDO1 (Port C5), SCK1 (Port C3) and CS pin (Port B0) as outputs
    TRISBbits.TRISB0 = 0;
    TRISCbits.TRISC3 = 0;
    TRISCbits.TRISC5 = 0;

    //set SDI1 (Port C4) as output because it is not needed
    TRISCbits.TRISC4 = 0;

    //set all CS pins high
    SPI_CS_0 = 1;

    //set to SPI master mode:

    //SSPxSTAT: SSPx STATUS REGISTER
    //| 7    | 6      | 5   4   3   2   1   0 |
    //| SMP  | CKE    | READ ONLY             |
    //see datasheet page 259
    SSP1STAT = 0b01000000;

    //SSPxCON1: SSPx CONTROL REGISTER 1
    //| 7    | 6      | 5      | 4   | 3   2   1   0 |
    //| WCOL | SSPxOV | SSPxEN | CKP | SSPxM<3:0>    |
    //see datasheet page 260
    SSP1CON1 = 0b00100000;

    return;
}

void LED_Driver_Configuration(void)
{
    SPI_Communication(0x04, 0x01);  //configuration; normal operation, global current, transition detection disabled
    SPI_Communication(0x02, 0x0F);  //global current; 16/16
//    SPI_Communication(0x09, 0x00);  //port configuration p7 - p4; LED driver
//    SPI_Communication(0x0A, 0x00);  //port configuration p11 - p8; LED driver
//    SPI_Communication(0x0B, 0x00);  //port configuration p15 - p12; LED driver
//    SPI_Communication(0x0C, 0x00);  //port configuration p19 - p16; LED driver
//    SPI_Communication(0x0D, 0x00);  //port configuration p23 - p20; LED driver
//    SPI_Communication(0x0E, 0x00);  //port configuration p27 - p24; LED driver
    SPI_Communication(0x0F, 0x00);  //port configuration p31 - p28; LED driver

    return;
}

void SPI_Communication(unsigned char command, unsigned char data)
{
    SPI_CS_0 = 0;
    SSP1BUF = command;              //send command
    while(!SSP1IF);                 //wait till transfer is complete
    SSP1BUF = data;                 //send data
    while(!SSP1IF);                 //wait till transfer is complete
    SPI_CS_0 = 1;

    return;
}

void SPI_Communication(unsigned char command, unsigned char data)
{
    SPI_CS_0 = 0;
    SSP1BUF = command;              //send command
    while(!SSP1IF);                 //wait till transfer is complete
    SSP1IF = 0;
    SSP1BUF = data;                 //send data
    while(!SSP1IF);                 //wait till transfer is complete
    SSP1IF = 0;
    SPI_CS_0 = 1;

    return;
}